{
"subject": "Re: 4 hashes parallel on SSE2 CPUs for 0.3.6",
"content": {
"format": "html",
"body": "<div class=\"post\">That's amazing... <br/><br/>So are you saying you use 128-bit registers to SIMD four 32-bit data at once? I've wondered about that for a long time, but I didn't think it would be possible due to addition carrying into the neighbour's value.</div>"
},
"source": {
"name": "Bitcoin Forum",
"url": "https://bitcointalk.org/index.php?topic=648.msg6751#msg6751"
},
"date": "2010-07-31T00:29:20Z"
}